The present invention relates to a technique of testing a ROM that is built in a semiconductor integrated circuit.
FIG. 4 illustrates a configuration for a known ROM-built-in semiconductor integrated circuit with a tester. The circuit shown in FIG. 4 includes selectors 61 and 62 connected to the input terminals of a ROM 51 and another selector 63 connected to the output terminal of the ROM 51. The tester is made up of these three selectors 61, 62 and 63. When a test signal TEST received at an input terminal S is in logical one state (which will be herein referred to as “at H-level”), each of these selectors 61, 62 and 63 selects and outputs a signal received at another input terminal A.
In testing the ROM 51, the test signal TEST is asserted to H-level and supplied to the respective input terminals S of the selectors 61, 62 and 63. Then, input data received at external input terminals IN1 and IN2 are delivered as address and read inputs ADD and READ to the ROM 51 through the selectors 61 and 62, respectively. Subsequently, the output data DO of the ROM 51 is delivered through an external output terminal OUT by way of the selector 63. In this manner, according to the known technique, the ROM 51 is tested while allowing the user to control the input and output of data to/from the ROM 51 directly and externally.
However, where the user is allowed to control the data input and output to/from a ROM directly and externally, confidential information (e.g., microcode, secret keys and passwords), stored on the ROM, can be decoded easily by the third party such as hackers and crackers.
On the other hand, if a known built-in self-test (BIST) circuit is adopted, then the confidential information stored can have its security increased. However, to modify the contents of the confidential information, the BIST circuit itself, built in a semiconductor circuit, should be redesigned, thus considerably increasing the man-hour, the mask design cost and so on needed for the redesign process.